Architecture of Reconfigurable Computing

Open-Source Hardware-Software Co-Design Framework for Reconfigurable Architecture

ARC Lab at Fudan University focuses on reconfigurable computing architectures and EDA tools. Led by Prof. Lingli Wang, our group conducts cutting-edge research in FPGA architecture, coarse-grained reconfigurable arrays (CGRAs), and hardware-software co-design methodologies.

We are dedicated to building open-source frameworks that bridge the gap between hardware design and software compilation, enabling efficient domain-specific acceleration on reconfigurable platforms.

Our Research Publications

News

  • 2025-06 — Our paper “Adora Compiler: End-to-End Optimization for High-Efficiency Dataflow Acceleration and Task Pipelining on CGRAs” has been accepted at DAC 2025.
  • 2025-06 — “LEMOE: LLM-Enhanced Multi-Objective Bayesian Optimization for Microarchitecture Exploration” accepted at DAC 2025.
  • 2025-01 — Papers on Transistor Sizing via Bayesian Optimization and Yield-driven Clock Skew Scheduling presented at ASP-DAC 2025.
  • 2024-10 — “CFEACT: A CGRA-based Framework Enabling Agile CNN and Transformer Accelerator Design” presented at FPL 2024.
  • 2024-06 — “FDRA: A Framework for Dynamically Reconfigurable Accelerator” published in ACM TRETS.

What is ARC Lab?

The Architecture of Reconfigurable Computing (ARC) Lab is a research group at Fudan University, led by Prof. Lingli Wang. Our lab resides within the State Key Laboratory of ASIC and System.

Our mission is to advance the theory and practice of reconfigurable computing through innovative architecture design, efficient EDA algorithms, and automated hardware-software co-design flows.

Research Focus

  • FPGA Architecture Design — Novel LUT architectures (RLUT, DSLUT), routing architectures (VIB), and PLB exploration
  • CGRA Architecture & Compilation — Modeling frameworks (HETA, HierCGRA, FDRA), mapping algorithms (GRAFT, TransMap), and compiler infrastructure (Adora, MLIR-based)
  • Design Space Exploration — Multi-objective optimization using Bayesian methods and LLM-enhanced exploration (AUGER, MoDAF, LEMOE)
  • AI Acceleration — CNN/Transformer accelerators on reconfigurable hardware (CFEACT, COFFA, CGRA-HD)
  • EDA Algorithms — Logic synthesis, technology mapping, retiming, and clock skew scheduling

Get Started

Our projects are open-source and available on GitHub. Explore our frameworks and tools:

# CGRA Design & Compilation Framework
git clone https://github.com/fudaneda/chipyard.git

# Visit our website for more resources
# https://arc-fudan.lin.pub

We welcome collaboration and contributions. If you are interested in reconfigurable computing research, feel free to contact us.