Publications

Selected publications from ARC Lab, Fudan University. For a complete list, see Homepage of Prof. Wang.

2025

  • COFFA: A Co-Design Framework for Fused-Grained Reconfigurable Architecture Towards Efficient Irregular Loop Handling Y. Dai, X. Gao, Y. Qiu, J. Li, Y. Cao, Y. Mao, S. Chen, W. Yin, W.-S. Luk, L. Wang IEEE Transactions on Computers, 74(9):3099-3113, 2025. DOI

  • MoDAF: A Multi-objective Divide-and-Conquer Parameter Tuning Framework for CGRAs J. Li, Y. Dai, W. Yin, L. Wang ACM Transactions on Design Automation of Electronic Systems (TODAES), 30(5), 2025. DOI

  • RLUT: A Reduced LUT Architecture with Fine-Grained Scalability M. Yang, C. Zeng, K. Zhu, L. Wang ACM Transactions on Reconfigurable Technology and Systems (TRETS), 18(3), 2025. DOI

  • Two-Phase Transistor Sizing for FPGAs via Bayesian Optimization X. Cao, H. Kuang, Y. Wang, L. Wang ACM/SIGDA International Symposium on FPGAs (FPGA), pp.78-84, 2025. DOI

  • Yield-driven Clock Skew Scheduling Based on Generalized Extreme Value Distribution K. Zhu, W.-S. Luk, L. Wang Asia and South Pacific Design Automation Conference (ASP-DAC), 2025. DOI

  • Towards Efficient Data Parallelism on Spatial CGRA via Constraint Satisfaction and Graph Coloring Y. Dai, X. Gao, C. Shen, B. Peng, W. Yin, W.-S. Luk, L. Wang Asia and South Pacific Design Automation Conference (ASP-DAC), 2025. DOI

  • Adora Compiler: End-to-End Optimization for High-Efficiency Dataflow Acceleration and Task Pipelining on CGRAs J. Lou, Q. Zhu, Y. Dai, Z. Zhong, W. Yin, L. Wang Design Automation Conference (DAC), pp.1-7, 2025. DOI

  • LEMOE: LLM-Enhanced Multi-Objective Bayesian Optimization for Microarchitecture Exploration J. Li, J. Zhang, Y. Li, W. Yin, L. Wang Design Automation Conference (DAC), pp.1-7, 2025. DOI

  • DynVec: An End-to-End Framework for Efficient Vector-Dataflow Execution J. Li, X. Cao, K. Zhu, W. Yin, L. Wang IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp.1-9, 2025. DOI

2024

  • FDRA: A Framework for Dynamically Reconfigurable Accelerator Supporting Multi-Level Parallelism Y. Qiu et al., L. Wang ACM Transactions on Reconfigurable Technology and Systems (TRETS), 17(1), Article 4, 2024. DOI

  • HierCGRA: A Novel Framework for Large-Scale CGRA with Hierarchical Modeling and Automated DSE S. Chen et al., L. Wang ACM Transactions on Reconfigurable Technology and Systems (TRETS), 17(2), Article 35, 2024. DOI

  • HETA: A Heterogeneous Temporal CGRA Modeling and DSE via Bayesian Optimization Y. Dai, J. Li, Q. Zhu, Y. Qiu, Y. Hu, W. Yin, L. Wang IEEE Transactions on VLSI Systems, 32(3):505-518, 2024. DOI

  • A CGRA Front-end Compiler Enabling Extraction of General Control and Dedicated Operators X. Gao, Y. Qiu, Y. Dai, W. Yin, L. Wang Asia and South Pacific Design Automation Conference (ASP-DAC), pp.799-804, 2024. DOI

  • An Agile Deploying Approach for Large-Scale Workloads on CGRA-CPU Architecture J. Lou, X. Gao, Y. Mao, Y. Qiu, Y. Hu, W. Yin, L. Wang Design, Automation and Test in Europe Conference (DATE), pp.1-6, 2024. DOI

  • CFEACT: A CGRA-based Framework Enabling Agile CNN and Transformer Accelerator Design Y. Mao, X. Gao, J. Lou, Y. Qiu, W. Yin, W.-S. Luk, L. Wang International Conference on Field Programmable Logic and Applications (FPL), pp.213-219, 2024. DOI

  • TransMap: An Efficient CGRA Mapping Framework via Transformer and Deep Reinforcement Learning J. Li, Y. Dai, Y. Hu, J. Li, W. Yin, J. Tao, L. Wang IEEE IPDPS Workshops, pp.626-633, 2024. DOI

  • CGRA-HD: An Efficient Reconfigurable Accelerator for Hyperdimensional Computing J. Qin, Y. Dai, L. Wang International Conference on Field-Programmable Technology (FPT), 2024. DOI

  • An MLIR-based Compiler for Hardware Acceleration with Recursion Support J. Li, Z. Zhang, X. Zhou, L. Wang International Conference on Field-Programmable Technology (FPT), 2024. DOI

2023

  • GRAFT: GNN-based Adaptive Framework for Efficient CGRA Mapping J. Li, C. Cai, Y. Zhao, Y. Yan, W. Yin, L. Wang International Conference on Field-Programmable Technology (FPT), pp.25-33, 2023. DOI

  • VIB: A Versatile Interconnection Block for FPGA Routing Architecture K. Shi, H. Zhou, L. Wang International Conference on Field-Programmable Technology (FPT), pp.78-86, 2023. DOI

  • AUGER: A Multi-Objective Design Space Exploration Framework for CGRAs J. Li, Y. Hu, Y. Dai, H. Kuang, L. Wang International Conference on Field-Programmable Technology (FPT), pp.87-94, 2023. DOI

  • Multi-objective Design Space Exploration for HLS via Bayesian Optimization (Best Paper Award, Digital Design Track) H. Kuang, L. Wang International Symposium of EDA (ISEDA), pp.150-155, 2023. DOI

  • Iterative and Verifiable Retiming for FPGA Performance Optimization K. Zhu, H. Zhou, W.-S. Luk, J. Tao, L. Wang International Symposium of EDA (ISEDA), 2023. DOI